Author(s)

A. C. G. Oliveira, J. P. L. Bressan, L. E. Zárate & N. J. Vieira

Abstract

Data mining applied for analysis of fault sequences in electronic circuits A. C. G. Oliveiral, J. P. L. ~ressan', L. E. ziratel & N. J. vieira2 I Department of Computer Science,Pontifcia Universidade Cato'lica de Minas Gerais, Brazil 2 Department of Computer Science, Universidade Federal de Minas Gerais, Brazil Abstract In electronics industries, more precisely in the UPS (Unintenuptable Power Supply) industry, there is a challenge to discover an optimized testing sequence for electronic cards. If a fault occurs in a test, the procedure is to repair the electronic card immediately; however the test may depend on previous tests that should be repeated. The situation could be time consuming if a fault occurs at the end of a testing sequence. In some cases, the whole testing sequence might have to be repeated. The optimized testing sequence is obtained by discovering test patterns and bringing them to the beginning of the sequence. The purpose of this paper is to develop an optimized testing sequ

Keywords